The invention relates to a circuit for CSD-coding of a binary number represented in two's complement.
What is meant by a CSD-code (Canonical-Signed-Digit-Code) is a binary code in which it is impossible for two neighboring binary digits to each have a respective binary "1". This means that so-called "1" blocks are missing in such a binary representation. It can be derived from the periodical "IEEE Transactions on Acoustics, Speech and Signal Processing", Vol. ASSP-24, No. 1, February 1976, pages 76-86, incorporated herein by reference, that the CSD-code is primarily employed in digital data processing, particularly for the representation of multipliers, since every "1" bit of such a multiplier denotes an addition or subtraction operation depending on its operational sign. The number of these operations should be kept as low as possible. While about N/2 "1" bits occur on the average given a general binary code of an N-digit number, the average number of such signals is reduced to about N/3 given a CSD code.